1. Technical Field
The present disclosure relates to the field of electronic devices. More specifically, this disclosure relates to electronic devices based on vertical MOS transistors.
2. Description of the Related Art
Electronic devices integrated on corresponding chips of semiconductor material, each one based on one or more MOS transistors, are commonly used in a number of applications. Particularly, in a vertical MOS transistor (also known as trench MOS transistor, or UMOS), a gate region (generally with a cellular structure) is formed in one or more gate trenches being dug in an active area of the chip, which gate trenches are covered by a layer of electrically insulating material (such as gate oxide) and then filled with a layer of electrically conductive material (such as doped polysilicon). As a consequence, during operation of the MOS transistor, its channel region extends along the vertical walls of the gate trenches of the gate so as to be relatively wide, thereby allowing the MOS transistor to support relatively high operating voltages. This structure is then particularly advantageous in power applications, wherein the operating voltages of the (power) electronic devices may reach values of the order of 500-2,000V (for example, for use in the control of motors, in voltage converters, in class-D amplifiers).
Generally, the operating voltages that may be supported by each MOS transistor are limited by its breakdown voltage, over which the MOS transistor conducts current in an uncontrolled way with risk of damaging it and/or other circuit elements connected thereto.
A known technique for increasing the breakdown voltage of the MOS transistor provides making a termination structure arranged around the active area (typically on an edge of the chip); the termination structure is designed so as to distribute an electric field that normally concentrates at the periphery of the active area, thereby reducing its intensity. The termination structures may be made in several ways, for example, with LOCOS, field-plates or guard-rings.
Particularly, as described in “Space-saving edge-termination structures for vertical charge compensation devices, R. Siemieniec, F. Hirler, C. Geissler, 13th European Conference on Power Electronics and Applications, 2009. EPE '09, ISBN: 978-1-4244-4432-8” (the entire disclosure of which is herein incorporated by reference), the termination structure may be formed by one or more rings of trenches. The trench of each ring is filled with oxide; moreover, regions of P-type semiconductor material are implanted superficially between the trenches and they are implanted buried beneath them. The trenches should be kept sufficiently spaced apart, so as to avoid that the buried regions should join because of next thermal processes.
In order to obtain a better distribution of the electric field and to avoid a fringing of its field lines in correspondence to the bottom (or basal) regions of the outermost gate trenches (which are most stressed by the electric field), it is also possible to make a deep edge ring (or mesh, the mesh is formed by forming trenches within the edge ring, which separates the edge ring into a mesh shape); such edge ring has a depth greater than the one of the gate trenches, so that the outermost gate trenches are sunk therein. In this way, a significant attenuation is obtained of the electric field at the basal regions of the outermost gate trenches.
However, the manufacturing of the deep edge ring is rather complex; particularly, the manufacturing complexity of the deep edge ring increases with the depth of the gate trenches. Therefore, this is particularly acute in the power electronic devices, wherein the gate trenches are typically very deep (for example, of the order of 6-10 μm).
Particularly, the manufacturing of deep edge ring uses specific machinery; for example, ion implanters at high energies are used to implant corresponding dopants and ovens at high temperatures are used to diffuse such dopants deeply. In addition, deep diffusion of the dopants is achieved with a relatively long time period to move the dopants. Alternatively, it is possible to use dopants with higher diffusion rate (such as Al).
In any case, the manufacturing of the deep edge ring does not use standard manufacturing processes (i.e., machinery and/or dopants), and it is therefore not of general applicability.
Moreover, the non-standard or long manufacturing processes of the deep edge ring have a negative impact on the final cost of the corresponding electronic devices.
A simplified summary of the present disclosure is herein presented in order to provide a basic understanding thereof; however, the sole purpose of this summary is to introduce some concepts of the disclosure in a simplified form as a prelude to its following more detailed description, and it is not to be interpreted as an identification of its key elements nor as a delineation of its scope.